Job Description
Job Title: Low-Power SoC DV Engineer
Experience: 5+ Years
Location: Bangalore
Job Overview:
We are looking for an experienced Low-Power SoC Design Verification (DV) Engineer with strong expertise in full-chip and sub-system level verification, particularly in low-power methodologies using UPF.
Mandatory Skills & Experience:
- Strong experience in full-chip SoC and/or sub-system level verification with UPF
- Experience in VIP development or only IP-level verification will not be considered .
- If experience includes both IP and SoC/sub-system verification, at least 70–80% of the work must be SoC/sub-system + UPF verification .
- Hands-on experience in testbench (TB) development from scratch or development of major TB components such as:
- Scoreboard
- Drivers
- Sequencers
- Checkers ...