FPGA Verification Engineer – UVM Expert (Onsite)

A leading tech company is seeking an FPGA Verification Engineer to join their dynamic team in Santa Clara, CA. The role involves verification of complex FPGA designs, developing verification plans, and collaborating with design engineers. Candidates should possess 3+ years in FPGA verification and a relevant degree. Strong skills in SystemVerilog and UVM are essential. This job demands excellent communication and debugging skills, offering competitive pay based on experience.
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