Job Description
Job Description: The descriptions are for layout engineers for our Library Group. Library Group is a part of Central Engineering Group. In Library Group, we focus on circuit design for memory, I/O (Input/Output), and Standard Cells. Requirements:
Strong layout knowledge with a minimum of 2 to 3 years of experience Skills include Cadence layout, Cadence schematic capture, using CALIBRE & Hercules verification tools. Strong layout knowledge in submicron process, e.g. 16nm, 7nm, 5nm, 3nm,2nm etc Experienced in digital (standard cell, memory, I/O) layout Experienced in analog layout is also a plus
Job Description:
Responsible to understand and apply all necessary layout guidelines (standard cells, I/O memories), new process rules and other technical requirements for quality layout Schedule time-line & layout floor-planning Complete quality layout and verification within planned schedule (without supervision for experienced engineer) Get up to speed quickly for new methodologies, o...
Strong layout knowledge with a minimum of 2 to 3 years of experience Skills include Cadence layout, Cadence schematic capture, using CALIBRE & Hercules verification tools. Strong layout knowledge in submicron process, e.g. 16nm, 7nm, 5nm, 3nm,2nm etc Experienced in digital (standard cell, memory, I/O) layout Experienced in analog layout is also a plus
Job Description:
Responsible to understand and apply all necessary layout guidelines (standard cells, I/O memories), new process rules and other technical requirements for quality layout Schedule time-line & layout floor-planning Complete quality layout and verification within planned schedule (without supervision for experienced engineer) Get up to speed quickly for new methodologies, o...