Job Description
Description
:
Responsible for custom layout floorplan, matching guides, resistor/capacitor placement, reduce coupling & noise, sensitive signals routing, mix-signals routing, etc.Responsible for custom layout top level hierarchy floorplan for blocks/powersResponsible for high-speed mixed-signal PHY such as SerDes, USB, DDR, etcResponsible for cooperation with analog circuit design team to ensure high efficiency and quality for analog layout design.Position Requirements:
BSEE degree with 4+ years of applicable experience in analog/custom layout of advanced technology nodesProficient with Layout edit/verify tools, like Virtuoso XL, Pegasus/Calibre DRC/LVS, etc.Proficient with EMIR tools, like Voltus-FIHands-on experience conducting DRC/LVS/ERC analysis, EMIR analysis, and recommending appropriate solutionsFundamental understanding of IC design technology and process/methodology...