Job Description
Performs functional verification of IP logic to ensure design will meet specification requirements.
- Develops IP verification plans, test benches, and the verification environment to ensure coverage to confirm to microarchitecture specifications.
- Executes verification plans, defines/runs system simulation models to verify the design, analyze power/timing, and uncover bugs.
- Replicates, root causes, and debugs issues in the presilicon environment.
- Finds and implements corrective measures to resolve failing tests.
- Collaborates with architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features.
- Documents test plans, drives technical reviews of plans and proofs with design and architecture teams.
- Maintains and improves existing functional verification infrastructure and methodology.
- Participates in the definition of verification infrastructure and related TFMs needed for functiona...
- Develops IP verification plans, test benches, and the verification environment to ensure coverage to confirm to microarchitecture specifications.
- Executes verification plans, defines/runs system simulation models to verify the design, analyze power/timing, and uncover bugs.
- Replicates, root causes, and debugs issues in the presilicon environment.
- Finds and implements corrective measures to resolve failing tests.
- Collaborates with architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features.
- Documents test plans, drives technical reviews of plans and proofs with design and architecture teams.
- Maintains and improves existing functional verification infrastructure and methodology.
- Participates in the definition of verification infrastructure and related TFMs needed for functiona...