Safety Verification Methodology Engineer

MediaTek

📍 Hsinchu City, Taiwan Province, Taiwan

Full-time Engineers Posted March 01, 2026

Job Description

Job Description1.Develop fault simulation flow for function safety.
2.Deploy fault simulation for safety IPs
3.Co-work with IP design verification teams to achieve pre-silicon verification of hardware safety requirements

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Requirement1.10+ years of engineering experience in IC design industry
2.5+ experience in design verification
3.Capability to collaborate with cross-organizations
4.Knowledge of ISO 26262, including the function safety aspects of design verification (preferred)
5.Experience in fault simulation (preferred)