Senior IC Layout Architect – High-Performance SoCs

A leading global technology company is seeking a Lead Principal Engineer, Layout Development, based in Mexico, Jalisco. This role involves providing technical leadership in advanced IC layout creation and ensuring high-performance silicon delivery. Candidates should have over 10 years of experience in IC layout development, strong expertise in layout methodologies, and excellent communication skills for cross-functional team collaboration. The position offers an opportunity to lead complex projects and mentor other engineers within a dynamic work environment.
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