Job Description
Responsibilities:
Perform block and chip-level verification in register-transfer level (RTL), gate-level and analog/mixed-signal (AMS).
Run digital/mixed-signal simulations as well as formal verification.
Work closely with the design team to create verification strategy and detailed verification plan.
Develop tests, run regressions and monitor coverage to ensure tape-out quality.
Participate in design or project reviews and support these with verification perspective and schedule/priority assessment.
Support post-silicon bring-up and debug, for bench validation as well as automated test equipment (ATE) testing.
Improve verification scalability and portability from project to project by environment enhancement and tools automation.
Minimum Qualifications:
3+ years experience in semiconductor industry
M.S. in EE/CS/CE or higher